
PA-RISC Chipsets Astro
2.4.12 Astro
Used in
A400 (rp2400, rp2430), A500 (rp2450, rp2470)
B1000, B2000, B2600
C3000, C3600, C3700
J5000, J5600, J6000, J6700, J7000, J7600
L1000 (rp5400), L2000 (rp5450)
Newer workstations and servers, based on the PA-8500, PA8600 and 8700 processors, use the Astro
chip for memory and I/O management (IOMMU). It includes most of the functions on a single die with
only few additional peripheral ASICs to interface and drive the specific buses.
Astro attaches to three different buses and is the central part of the chipset:
References
1. Processor system bus — Runway+/Runway DDR for (theoretically) up to two (apparently four
were possible) PA-8x00 processors with a clock of maximum of 125MHz (and peak bandwidth
of about 2.0GB/s)
2. Memory bus with a peak bandwidth of 2.0GB/s at maximum clock of 125MHz
3. I/O system buses made up from up to eight single I/O links (ropes) which attach to individual PCI
bridges — in most cases Elroy chips which convert each one or two I/O links into a PCI bus
There are several different variants of Astro, later ones were called Pluto.
Features
System/processor bus bandwidth of peak 2.0GB/s, sustainable 1.5GB/s, via 64-bit Runway+/Runway
DDR bus at maximum of 125MHz in DDR mode
Memory bandwidth of peak 2.0GB/s, sustainable 1.5GB/s (a variant of Runway)
Up to two or four processors [two were stated in the documentation but four actually imple-
mented in the L2000 server — Ed.]
Up to eight I/O links (ropes) — each 10-bit, 133MHz with datarate of 250MB/s; aggregate maxi-
mum 2.0GB/s
Support for 120/125MHz SDRAMs
Maximum supported memory of 40GB
PCI 2.1 compliant
16-entry fully associative I/O TLB
16-entry fully associative coherent I/O buffer cache
664-pin ceramic LGA
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