HP B160L Bedienungsanleitung Seite 227

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HP 9000/D-Class & R-Class Internals
Dx70: 1-2 PA-8000 160MHz with 512/512KB off-chip I/D L1 cache each
Dx80/R380: 1-2 PA-8000 180MHz with 1024/1024KB off-chip I/D L1 cache each
D390/R390: 1-2 PA-8200 240MHz with 2048/2048KB off-chip I/D L1 cache each
Notes
Systems with PA-7100LC/PA-7300LC processors are not SMP capable
The 1KB on-chip L1 cache on systems with a PA-7100LC is not really a true cache
The 2KB on-chip “assist” cache on systems with a PA-7200 is not really a true cache
Systems with a PA-7300LC processor feature an optional 1MB external L2 cache, provided
through two SRAM modules
Upgrading from one type of CPU to another mostly requires more than just changing the CPU
board (cf. D-Class and R-Class System Upgrade Guide).
Chipset
LASI ASIC, which features:
NCR 53C710 8-bit single-ended SCSI-2
Intel 82596CA 10Mb Ethernet controller
WD 16C522 compatible parallel
Harmony CD/DAT quality 16-bit audio
NS 16550A compatible serial
PA-7200 models: U2 I/O adapter Runway to GSC bridge
PA-8000 models: UTurn I/O adapter Runway to GSC bridge
PA-7200/PA-8000 models: MMC/SMC memory controllers
PA-7300LC models: Phantom PseudoBC GSC+ port
Wax chip
EISA bus converter (GSC-to-EISA)
Second RS232 serial
Intel 82503 Ethernet transceiver, media auto-selection
CS4215 or AD1849 programmable CODECs
D3x0: NCR 53C720 16-bit Fast-Wide high-voltage differential (HVD) SCSI-2
D390/R380/R390: DEC 21140 Fast Ethernet controller
Buses
On SMP-capable systems: Runway CPU/memory bus
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