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HP V2500 & V2600

4.51 HP V2500 & V2600

4.51.1 Overview

The V2500 and V2600 are the second generation scalable PA-RISC V-Class servers built upon the Con-

vex Exemplar architecture. They can hold up to 32 64-bit PA-RISC processors in a single “cabinet.” As

their Convex SPP2000 predecessors, and contrary to their V2200/V2250 cousins, multiple systems (up

to four) can be interconnected via so-called CTI links (independent rings — SCI interconnects). The

resulting combined system can have up to 128 CPUs and presents itself to the operating system as a

single computer. Architecturally, the interconnected V2500s/V2500s are ccNUMA computers, that is

cache-coherent Non-Uniform Memory Access (for a detailed explanation cf. for example the ccNUMA

section on the Wikipedia Non-Uniform Memory Access page

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The V-Class servers are based on a crossbar architecture — one central internal “switching” component

links the various computing resources to each other by connecting the devices’ inputs to other devices’

output ports (in effect forming matrix connections). The V2500 and V2600 use HP’s own HyperPlane

crossbar chipset, consisting of four central crossbar ASICs and various other chipset components to

attach memory, processors and I/O.

The architecture is a direct continuation from the Convex Exemplar — the SPP1x00 and SPP2000 S-

Class and X-Class, designed by Convex and later bought by HP, use a similar crossbar-based system

design (there based on GaA chips), upgraded in the V-Class more or less only with faster processors and

memory. Interestingly, a multi-node V2500/V2600’s system architecture ( “SCA” ) does not conform

fully to the PA-RISC 2.0 reference architecture — the ﬁrmware layer emulates a reference-compliant PA-

RISC system for the operating system (standard HP-UX 11). However several changes had to be made

to the (standard) HP-UX kernel to accomodate the V-Class’s special architecture (also called “technical

anomalies” ; cf. the HP Scalable Computing Architecture paper in the References).

The V2500s and V2600s are controlled via a so-called “teststation” (also called SSP, Service Support

Processor) a separate workstation which runs its own operating system and controls and monitors

the V-Class server (this was either a HP 9000/712 or B180L workstation with two Ethernet interfaces

running HP-UX 10.20 — earlier Convex systems apparently used IBM RS/6000 workstations running

AIX to control the Exemplar systems). The SSP/teststation connects to the Core Utilities Board (CUB),

which provides booting, system monitoring and diagnostics, and console connections (connected via

one LAN and one special serial link).

Introduced: 1999 (V2500), 2000 (V2600)

4.51.2 Internals

CPU

 V2500: 2-32 PA-8500 440MHz with 512/1024KB on-chip I/D L1 cache each

 V2600: 2-32 PA-8600 552MHz with 512/1024KB on-chip I/D L1 cache each

Chipset

The V-Class V2500 and V2600 are based on the HP HyperPlane crossbar which connects the CPU and

I/O to the system main memory.

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http://en.wikipedia.org/wiki/Non-Uniform_Memory_Access#Cache_coherent_NUMA_.28ccNUMA.29

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