
PA-RISC Processors PA-8500 (PCX-W) (Vulcan)
The main challenge in the PA-8500 development were the large on-chip L1 caches, which had to fit
onto the allocated die area and be able to keep up with the instruction reordering in the IRB. The data
cache is composed of 0.5MB banks, implemented with four 0.125MB arrays providing error correction.
The instruction cache is implemented as one bank of 0.5MB four-way set associative pipelined cache,
providing 128 bits of instruction per cycle plus pre-decode bits.
Details
PA-RISC version 2.0 64-bit
Ten functional units: 2 integer ALUs, 2 shift/merge units, 2 complete load/store pipelines, 2
Floating Point multiply/accumulate units, 2 Floating Point divide/square root units
4-way superscalar
Two address adders
SMP-capable
External memory and I/O controllers
160-entry fully-associative dual-ported TLB
32-entry BTAC (branch target address cache)
2048-entry BHT (branch history table)
Dynamic and static branch prediction modes
On-chip L1 caches 0.5MB I and 1MB D, each 4-way set associatve
32 or 64 Byte cache line size
Supports up to 1 TB of physically addressable memory (40-bit physical addresses)
56-entry instruction queue/reorder buffer (IRB)
MAX-2 multimedia extensions (subword arithmetic) for multimedia applications, e.g., MPEG
decoding
Bi-endian support
Runway+/Runway DDR system/memory bus, 125MHz, 64-bit, DDR (double data rate), about
2.0GB/s peak bandwidth
CPU interfaces in most systems to the Astro memory and I/O controller (on very few configura-
tions the PA-8500 attaches to the DEW Runway ports/converters of the Stretch chipset)
Up to 440MHz frequency with 2.0V core voltage
21.3×22.0 mm
2
die, 140,000,000 FETs, 0.25µ(micron), 5-layer metal CMOS packaged in a 544-
pin LGA package
References
HP Pumps Up PA-8x00 Family
26
(archive.org mirror) Linley Gwennap (October 1994: Micro-
processor Report, Volume 10 Number 14). [Article reprint for vanished cpu.hp.com]
26
http://web.archive.org/web/20040214112604/http://www.cpus.hp.com/technical_references/101996ar.shtml
24
Kommentare zu diesen Handbüchern