Hp ProLiant DL140 G3 Server Bedienungsanleitung PDF herunterladen (Seite 24)

System BIOS configuration 24

Table 19 lists the checkpoint codes written at the start of each test and the beep codes issued for terminal errors.

Table 19 POST beep codes

Code Beep Description

02h Verify real mode

03h Disable non-maskable interrupts

04h Get processor type

06h Initialize system hardware

07h Disable shadow and execute code from the ROM

08h Initialize chipset with initial POST values

09h Set IN POST flag

0Ah Initialize processor registers

0Bh Enable processor cache

0Ch Initialize caches to initial POST values

0Eh Initialize I/O component

0Fh Initialize the local bus IDE

10h Initialize power management

11h Load alternate registers with initial POST values

12h Restore processor control word during warm boot

13h Initialize PCI bus mastering devices

14h Initialize keyboard controller

16h 1-2-2-3 BIOS ROM checksum

17h Initialize cache before memory auto size

18h 8254 timer initialization

1Ah 8237 DMA controller initialization

1Ch Reset programmable interrupt controller

20h 1-3-1-1 Test DRAM refresh

22h 1-3-1-3 Test 8742 keyboard controller

24h Set ES segment register to 4 GB

28h Auto size DRAM

29h Initialize POST Memory Manager

2Ah Clear 512 KB base RAM

2Ch 1-3-4-1 RAM failure on address line xxxx

2Eh 1-3-4-3 RAM failure on data bits xxxx of low byte of memory bus

2Fh Enable cache before system BIOS shadow

32h Test processor bus-clock frequency

33h Initialize Phoenix Dispatch Manager

36h Warm start shut down

38h Shadow system BIOS ROM

3Ah Auto size cache

3Ch Advanced configuration of chipset registers

3Dh Load alternate registers with CMOS values

41h Initialize extended memory for ROM pilot

42h Initialize interrupt vectors

1 2 ... 19 20 21 22 23 24 25 26 27 28 29 ... 54 55

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